E; a stack pointer
S; an instruction pointer
Iwhen executing is set to the address of the next instruction to run; and a boolean flag
[A]to read or write memory at the address stored in register
A. To mimic address modes, some arithmetic (e.g.
[A+D+2]) is available but is limited to addition with registers
Eor constant offsets, since in an hypothetical effective CPU design this would have a negative impact on branch prediction.
Wfor the machine word width byte count, but is currently
1since addresses index into a plain array of integers.
A=Bto copy (assign) the value of
A+Bto calculate the sum of the value of
Band store it in
A?Bto compare the value of
Ato the value of
Band have the flag
Fset accordingly. Also
A<=Bless then or equal,
A>=Bgreater than or equal.
?to have it only perform when the flag
!to have it only perform when the flag
Fis not set.
,to have it behave atomically with the preceding instruction. This currently has no effect since this virtual CPU won't be handling IRQ's, but in a theoretical physical design this is important to guarantee correct operation with conditional instructions. Instructions prefixed with
!also behave atomically.
S-W,[S]=A. Pop? There is no pop. Do
Ito hold the address of the next instruction to perform. (Program loading supports labels prefixed with
:, see below.)
[S]+2instruction is to have the return address point to past the
I=Ainstruction, see below).
I=[S]would jump and never reach
Ior Run to start execution at
S-W,[S]=I,I=11to output the value of
A, 12 for
S-W,[S]=I,I=21to output the value of
[A], 22 for
I=9to halt execution cleanly. (Running past the end of the program would cause an Instruction pointer past end of program error.)